Designing 2D and 3D Network-on-Chip Architectures
| dc.contributor.author | Tatas, Konstantinos | |
| dc.date.accessioned | 2019-08-21T11:32:05Z | |
| dc.date.accessioned | 2024-04-22T11:23:18Z | |
| dc.date.available | 2019-08-21T11:32:05Z | |
| dc.date.available | 2024-04-22T11:23:18Z | |
| dc.date.issued | 2014 | |
| dc.identifier.isbn | 978-1-4614-4274-5 | |
| dc.identifier.uri | https://drs.ess.gov.et/handle/12345678/79212 | |
| dc.language.iso | en | en_US |
| dc.publisher | Springer Science | en_US |
| dc.subject | Architectures | en_US |
| dc.title | Designing 2D and 3D Network-on-Chip Architectures | en_US |
| dc.type | Book | en_US |